Panel Driver 3

Understanding the panel driver.3

TIMING CONTROL

Pictured above is an example of a circuit block driver panel. Timing and control is the heart of this circuit, which is responsible for:

• Controlling the timing (time) the mechanism of how the image data is received by turning on each pixel so as to form an image.
• Reset Row driver (gate driver) and Colom driver (data driver) for each time the start began to show images of the upper corner of the left and then perform scanning (sweeping) the image data line by line down seems like the TV tube on the entire surface until ceases at bottom-right corner of the screen.
• Row select line driver which should be turned on or off
• Colom driver inputs change digital image data into an analog voltage to regulate any pixel that needs dinyalakn and adjust the level of light-darkness of each pixel.

There are several kinds of input pulse signal from the mainboard via the LVDS cable to the control timings, mostly:

• Vertical Sync (Frame pulse) - used to reset Row Colom drivers and drivers so that every time began the formation of a "frame" image always starts from the top left corner of the screen.
• Horizontal sync (Line pulse) - used to reset so that the establishment of any "line" or "line" image always starts from the left edge of each scanning line locker
• Dot clock (pixel clock) - is used for the control refresh-rate as an indicator if the input data has changed.
• Enable or synchronization of data - as an indicator that the incoming data is valid
• RGB digital image data series
• Some types of panels may require additional input pulses, such as "invert" for alternating pictures and digital systems working options "VESA or JEIDA"

Note:

• The explanation above is just in general.
• Timing control circuit between a panel with other panels there may be differences, depending on the design and ic used
• Some are simple and some are complex